The invention pertains to a solid-state imaging sensor having provision for automatically adjusting the sensitivity of the device in accordance with changes in the average level of the image being sensed.
A prior art imaging sensor of the same general type to which the invention pertains is illustrated in FIG. 1. In this arrangement, an imaging sensor array 5 is provided which includes a plurality of rows and columns of pixels (picture elements) 10, each of which is sensitive to light in a corresponding portion of the image being sensed. The pixels 10 are arranged at intersections of horizontally extending electrodes 21-1 to 21-4, which are coupled to corresponding outputs of a vertical shift register 20, and vertically extending electrodes 33-1 to 33-4, which are coupled through respective FET switching devices 32-1 to 32-3 to output circuitry. The output circuitry includes a resistor 23 connected between an output line 24 and ground or another reference potential. An operational amplifier supplying a virtual ground to the output line 24 may be used in place of the resistor 23. The gates of the devices 32-1 to 32-4 are coupled to respective outputs 31-1 to 31-4 of a horizontal shift register 30. In FIG. 1, only a three-by-three matrix of pixels is shown for convenience in illustration; in practice, of course, many more pixels would be employed.
As further indicated in FIG. 1, the equivalent circuit of each pixel 10 includes an FET device 12 having a gate coupled to a respective one of the horizontally extending electrodes 21-1 to 21-4 and a drain connected to a corresponding one of the vertically extending electrodes 33-1 to 33-4. Each pixel includes a diode 13 having an anode coupled to ground and a cathode coupled to the source terminal of the corresponding FET device 12. Light sensing current is supplied to the cathode of the diode 13 through a parallel-connected resistor 14 and capacitor 15, the opposite terminals of which are connected to a source of a fixed voltage V.sub.T.
All of the components illustrated in FIG. 1 are preferably formed on a single integrated circuit chip. Referring momentarily to FIG. 2, there is shown a cross-sectional view through such a chip indicating generally the construction of one of the pixels 10. The array is constructed upon a P-type substrate 40. N+ source and drain diffusions 41 and 44, respectively, are formed in the P-type substrate 40. Field oxide regions 45 and 46 serve to isolate the source and drain diffusions from adjacent pixels. A metal layer 48 contacts the source diffusion 41 and extends over the majority of the area of the chip occupied by this particular pixel. A channel 43 is formed under a gate electrode 42, which forms a part of one of the horizontally extending electrodes 21-1 to 21-4. The layer 48 and the electrode 42 are insulated from one another by an oxide layer 47, The oxide layer 47 and the metal layer 48 are covered by a photoconductive film 49. A transparent conductive electrode 50 is formed above the film 49. A voltage source 51, which supplies the fixed voltage V.sub.T from a position off the chip, is connected to the transparent electrode 50.
Referring back to FIG. 1, to read out the pixels of the sensor array 5, the electrodes 21-1 to 21-4 are activated in sequence by the vertical shift register 20 by applying positive pulses to the electrodes 21-1 to 21-4 in sequence. While, for instance, the electrode 21-2 has a positive voltage applied thereto by the vertical shift register 20, each of the pixels 10 in the row of pixels served by the electrode 21-2 are read out in sequence by sequentially turning on the FET devices 32-1 to 32-3 by applying, again in sequence, positive pulses to the gates of the devices 32-1 to 32-3 from respective outputs 31-1 to 31-4 of the horizontal shift register 30.
When the FET devices 12 and 32-1 are both turned on, the capacitor 15 is connected through the resistor 23 between ground and the potential V.sub.T, and hence charged to V.sub.T. When the devices 12 and 32-1 are subsequently turned off, the capacitor 15 is free to be discharged through the resistor 14, the resistance of which varies in accordance with the intensity of light shining on the pixel 10. Thus, the amount of discharging which occurs between read-out operations is determined by the integrated (mean) intensity of the light which shone on the pixel 10 during the time period between read-out operations. Therefore, during each pixel read-out operation, the voltage developed across the resistor 23 is a measure of the mean light intensity which shone on the respective pixel 10 in the time interval following the immediately previous read-out operation.
The arrangement of FIGS. 1 and 2 suffered from a significant drawback in that the pixels could saturate in the presence of an intense sensed image. That is, if the image being sensed is sufficiently intense, large numbers, or possibly all, of the pixels could become saturated due to the respective capacitors 15 being fully discharged between read-out periods. In such a case, no output picture information can be obtained.
One prior art approach to solving this problem was to provide a mechanical shutter for the camera employing the imaging sensor. The mechanical shutter could be adjusted, either manually or automatically, until a satisfactory output signal was obtained. Although the use of a mechanical shutter did solve the problem of saturation, mechanical shutters are disadvantageous in that they are relatively expensive, their operation is slow, and they are less reliable than semiconductor circuits.
Accordingly, it is an object of the present invention to provide a solid-state imaging sensor in which pixel saturation is prevented over a wide range of light amplitudes without having to provide a mechanical shutter.